Hi, Please see the below requirement & let us know your comfort levelASAP Client: UST global Location: Malaysia Permanent Expert on Analoglayout design of block level and chip level from schematics. Hands onexperience in Analog Layout design of various designs SerDes, LVDS, DDRPhy, PLL, Linear and Switching regulators and analog building blocksamplifiers, comparator, oscillator, voltage and current referencecircuits etc. Good understanding of deep sub-micron and DFM issues andlayout techniques Should have work experience in CMOS processtechnologies 22nm, 28nm, 45nm, 65nm etc. Thorough working knowledge oflayout design and physical verification tools - Cadence Virtuoso layoutsuite, Mentor Calibre, Synopsys Hercules etc Interested candidates canshare their resumes or references to firstname.lastname@example.org
Kaizen Sra Technologies Private Limited is looking for .
Looking for Any Graduate / Post Graduate graduates profile.